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Research_

Computer and systems architecture

Pushing the boundaries of system software and hardware

We’re co-designing efficient software-hardware systems for emerging deep learning training and inference, augmented reality, planet-scale extended reality and cross-stack support for future quantum architectures and applications.

Our research is at the boundary of system software and hardware, breaking down abstraction barriers, and rethinking the hardware–software interfacing.

We approach our problems from a holistic design approach, solving them with a blend of cross-stack co-designing algorithms, computer hardware, and compiler, runtime and operating system (OS) software.

The emerging application domains we are currently interested in and designing for include:

  • large-scale artificial intelligent (AI) services and novel deep learning networks, 
  • augmented reality (AR), virtual reality (VR) and mixed reality (MR), and
  • future quantum architectures. 

Our industry collaborators include Google Brain, Facebook Reality Labs and Alibaba Ant Financial.
 

Our research

Our experts: Dr Shuaiwen Leon Song

Our partners: Professor Alvin Lebeck (Duke University, USA), Associate Professor Michael Taylor (University of Washington, USA), Dr Xin Fu (University of Houston, USA), Dr Lizy John (University of Texas at Austin, USA)

Industry partners: Sara Hooker (Google Brain), Mike Zhan (Ambarella Inc), Yongchao Liu (Alibaba Research)

AI-driven system design has become prevalent, from embedded systems such as IoT and edge computing to large-scale data centre and HPC system design. 

However, the current data-flow driven design has shown significant inefficiency on new deep learning networks. 

By leveraging our unique research capability via looking into different design stacks from programming language, compiler and runtime to hardware customisation, we’re exploring other better alternatives (such as memory- and data-centric designs) to help practitioners build their software and hardware layers of the desired deep learning systems. 

Our primary focus is to provide general strategies for designing accelerators or systems that can accommodate the unique aspects of emerging DL and ML networks. 

We’re also exploring design principles and optimisation strategies for the emerging probabilistic machine learning models such as Bayesian Neural Networks and of Markov Chain Monte Carlo. 

Our recent works have resulted in top HPC and architecture conferences including Supercomputing, ISCA and HPCA. 

Our experts: Dr Shuaiwen Leon Song

Our partners: Associate Professor Michael Taylor (University of Washington, USA), Dr Qi Sun, New York University, USA), Dr Yuhao Zhu, (University of Rochester)

Industry partners: Dr Chenhao Xie (Pacific Northwest National Lab), Martin Brown (Martin Brown Film Studio), Facebook Reality Lab, Neo VR

High Quality Mobile Virtual Reality (VR) is what the incoming graphics technology era demands: users around the world, regardless of their hardware and network conditions, able to enjoy the immersive virtual experience. 

However, the state-of-the-art software-based mobile VR designs cannot fully satisfy the realtime performance requirements due to the highly interactive nature of user’s actions and complex environmental constraints during VR execution. 

Our research is tackling the future mobile VR with high quality and low latency via co-designing future planet-scale Extended Reality (XR) systems that rely on not only human visual system features but also light-weight real-time learning techniques. 

We propose the Q-VR design, the first high-quality low-latency mobile VR design for edge-cloud collaborative rendering. and have created several novel software components (new programming models and interfaces) and AI-driven architecture re-design to replace the state-of-the-art multi-accelerator design on today’s mobile SoCs. 

Our pioneer works to design VR systems have resulted in several top tier publications in ISCA, HPCA and ASPLOS. 

Our experts: Dr Isaac Kim, Dr Shuaiwen Leon Song

Our partners: Associate Professor Michael Taylor (University of Washington, USA), Dr Yuval Sanders (Macquarie University), Dr Xu Liu (North Carolina State University, USA)

Industry partners: IBM Quantum Centre, North Carolina State University

Advancements in the techniques to accurately store and process quantum information have led towards the realisation and implementation of small to intermediate scale prototype quantum devices.

These devices present challenges involving both the targeted compilation of quantum programs and the reduction and elimination of noise.

These challenges are being whittled down with a combination of architectural novelties, characterisation, and architecture aware implementation design, including:

  • compiler support for quantum programs
  • integrating error analysis and mitigation with compiler processes
  • architecture-aware compiler optimisations.

Our experts: Professor Alan Fekete, Professor Willy Zwaenepoel, Dr Baptiste Lepers, Dr Shuaiwen Leon Song

Our partners: McGill University (USA), EPFL (Switzerland), INRIA (France)

Industry partners: Microsoft Research, Nutanix

In our modern digital life, activities from buying clothes to accessing government services depend on working with computer applications which store information in a long-lasting form.

That is, they need a data store, where information (called ”values”) is found using a label or ”key”.

So the key-value store is vital for the functionality and performance of all applications.

Even relational databases typically contain a key-value store as a storage engine, underneath layers that support a richer query model.

The current key-value stores are designed for today’s typical hardware environment with a memory hierarchy of slow but capacious hard disk, flash-based SSD, and fast but limited and volatile RAM. 

Currently, key-value stores cannot leverage the speed of fast NVMe SSDs and byte-addressable persistent memory.

Our research rethinks the way data is stored in memory and on disk to design a fast key-value store for modern drives and persistent memory.

We have observed that the overall system performance bottleneck is caused by CPU speed instead of the storage device bandwidth or latency,and proposed a new storage layout and streamlined algorithms to access data on fast NVMe SSDs.

Our pioneer work to redesign key-value stores has resulted in several top tier publications in SOSP and OSDI.