Outline

Overview

This unit of study aims to provide experience, confidence and competence in the design and implementation of embedded systems; to impart a detailed knowledge of the software and hardware architecture of modern embedded systems and an understanding of the use of these resources in product design; and to provide experience of working in a project team to design and prototype an embedded system. Content will include single processor systems, multiple and distributed processing systems, special purpose architectures (FPGA, DSPs etc) and their applications; embedded operating systems; standard interfacing of sensor and actuation systems; ADC/DAC, SSI, parallel, CAN bus etc.; specific requirements for embedded systems; problem definition and system design; tools for design, development and testing of prototype systems. The unit of study will include a project where groups of students design, develop and commission an embedded system product to meet a specification. At the end of this unit students will understand the organisation of single and multiple processor systems, special purpose architectures (FPGAs, DSPs etc.) and their applications. Students will have a detailed knowledge of the software and hardware architecture of a modern embedded system. This knowledge will include an in-depth understanding of the advantages and limitations of embedded processors, of the utilisation and interfacing of hardware resources, and of the design and development of software for embedded applications. The students will have the competence to develop and prototype embedded systems.

Unit details and rules

Academic unit	Aerospace, Mechanical and Mechatronic
Credit points	6
Prerequisites ?	AMME2000 and MTRX2700
Corequisites ?	None
Prohibitions ?	MECH4710
Assumed knowledge ?	Completion of a first course in microprocessor systems, including assembly and C language programming, interfacing, introductory digital and analogue electronics
Available to study abroad and exchange students	Yes

Teaching staff

Coordinator	Viorela Ila, viorela.ila@sydney.edu.au

Assessment

The census date for this unit availability is 1 September 2025

Details
Criteria

Type	Description	Weight	Due	Length	Use of AI
Written exam ?	Final Exam Open book	30%	Formal exam period	2 hours	AI prohibited
Outcomes assessed:
Written work	Assignment 2: Report This is the report fir the Assignment 2	5%	Mid-semester break Due date: 29 Sep 2025 at 23:59	3 weeks	AI allowed
Outcomes assessed:
Out-of-class quiz	EdStem Quiz EdStem Quiz	2%	Week 02 Due date: 06 Aug 2024 at 23:59	1 week	AI allowed
Outcomes assessed:
Practical skill	EdStem Lesson 1 EdStem Lesson	3%	Week 04 Due date: 25 Aug 2025 at 23:59	2 week	AI allowed
Outcomes assessed:
In-person practical, skills, or performance task or test	Assignment 1- Demonstration In Lab demonstration	4%	Week 05 Due date: 04 Sep 2025 at 23:59	3 weeks	AI prohibited
Outcomes assessed:
Interactive oral	Assignment 1 and Lessons 1–2: Interactive Assessment Q&A covering Assignment 1 and Lessons 1–2 material	5%	Week 05 Due date: 04 Sep 2025 at 23:00	3 weeks	AI prohibited
Outcomes assessed:
Practical skill	EdStem Lesson 2 EdStem Lesson	3%	Week 05 Due date: 01 Sep 2025 at 23:59	2 week	AI allowed
Outcomes assessed:
Written work	Assignment 1: Report This is the report component of Assignment 1	5%	Week 06 Due date: 08 Sep 2025 at 23:59	3 weeks	AI allowed
Outcomes assessed:
Practical skill	EdStem Lesson 3 EdStem Lesson	3%	Week 07 Due date: 15 Sep 2025 at 23:59	2 week	AI allowed
Outcomes assessed:
In-person practical, skills, or performance task or test	Assignment 2 - Demonstration In lab demonstration	5%	Week 08 Due date: 25 Sep 2025 at 23:59	3 weeks	AI prohibited
Outcomes assessed:
Interactive oral	Assignment 2 and Lessons 3–4: Interactive Assessment Q&A covering Assignment 2 and Lessons 3-4	5%	Week 08 Due date: 25 Sep 2025 at 23:00	3 weeks	AI prohibited
Outcomes assessed:
Practical skill	EdStem Lesson 4 EdStem Lesson	3%	Week 08 Due date: 22 Sep 2025 at 23:59	2 weeks	AI allowed
Outcomes assessed:
Presentation	Major Project - Pitch This is the pitch component of the Major Project	3%	Week 09 Due date: 08 Oct 2025 at 23:59	1 week	AI allowed
Outcomes assessed:
In-person practical, skills, or performance task or test	Major Project - Demo This is the Demo component of the Major Project	8%	Week 12 Due date: 30 Oct 2025 at 23:59	4 weeks	AI prohibited
Outcomes assessed:
Interactive oral	Major Project: Interactive Assesment Q&A Major Project	5%	Week 12 Due date: 30 Oct 2025 at 22:00	4 weeks	AI prohibited
Outcomes assessed:
Practical skill	EdStem Lesson 5 EdStem Lesson	3%	Week 13 Due date: 09 Nov 2025 at 23:59	1 week	AI allowed
Outcomes assessed:
Written work	Major Project - Report This is the report component of the major project	8%	Week 13 Due date: 03 Nov 2025 at 23:59	4 weeks	AI allowed
Outcomes assessed:
= hurdle task ? = group assignment ?

Assessment summary

Assessment Description

EdStem Lessons 1-5: questions are to be answered individualy and will assess the progregress in understanding the course material.
Assignment 1: FPGA programming Students will be working in groups and is intended to ensure that all students gain practice in programming FPGA devices.
Assignemnt 2: FPGA Programming: Students will be working in groups and is intended to ensure that all students gain practice in programming FPGA devices.
Major Project: MTRX3700 Mechatronics 3 is a project-based unit of study. Students will work in larger groups of 4 or 5. There is strong emphasis placed on understanding the material so that a student can make things work in hardware.
Demonstration: Assignment 1 and 2, and the major project will have a mandatory in-lab demonstration component.
Individual Q&A: Assignment 1 and 2, and the major project will have a mandatory in-lab Q&A component.
Presentation: An oral presentation is required early in the Major Project development cycle and another presentation is required before demonstrating the results.
Moderation of Group Work Marks: Group marks will be moderated on the basis of individual effort and understanding using SparkPlus peer review and as perceived by the Lecturer and Tutor(s).
The Exam is a hurdle task
Detailed information for each assessment task can be found on Canvas.

Assessment Feedback

Students can expect feedback for this Unit of Study through discussion during lectures and laboratory sessions, through participation in the Ed discussion forum, and through written comments on assignments.
Students can provide feedback to the Lecturers and Tutors by discussion during lectures or tutorial/ laboratory sessions, and by submitting comments and questions to the Ed discussion forum.

Assessment criteria

The University awards common result grades as set out in the Coursework Policy 2014 (Schedule 1).

Standards Based Assessment

Final grades in this unit are awarded at levels of HD for High Distinction, DI for Distinction, CR for Credit, PS for Pass and FA for Fail as defined by University of Sydney Coursework Policy 2014.

As a general guide, a high distinction indicates work of an exceptional standard, a distinction a very high standard, a credit a good standard, and a pass an acceptable standard. For more information see sydney.edu.au/students/guide-to-grades.

For more information see guide to grades.

Use of generative artificial intelligence (AI)

You can use generative AI tools for open assessments. Restrictions on AI use apply to secure, supervised assessments used to confirm if students have met specific learning outcomes.

Refer to the assessment table above to see if AI is allowed, for assessments in this unit and check Canvas for full instructions on assessment tasks and AI use.

If you use AI, you must always acknowledge it. Misusing AI may lead to a breach of the Academic Integrity Policy.

Visit the Current Students website for more information on AI in assessments, including details on how to acknowledge its use.

Late submission

In accordance with University policy, these penalties apply when written work is submitted after 11:59pm on the due date:

Deduction of 5% of the maximum mark for each calendar day after the due date.
After ten calendar days late, a mark of zero will be awarded.

Academic integrity

The University expects students to act ethically and honestly and will treat all allegations of academic integrity breaches seriously.

Our website provides information on academic integrity and the resources available to all students. This includes advice on how to avoid common breaches of academic integrity. Ensure that you have completed the Academic Honesty Education Module (AHEM) which is mandatory for all commencing coursework students

Penalties for serious breaches can significantly impact your studies and your career after graduation. It is important that you speak with your unit coordinator if you need help with completing assessments.

Visit the Current Students website for more information on AI in assessments, including details on how to acknowledge its use.

Learning support

Simple extensions

If you encounter a problem submitting your work on time, you may be able to apply for an extension of five calendar days through a simple extension.  The application process will be different depending on the type of assessment and extensions cannot be granted for some assessment types like exams.

Special consideration

If exceptional circumstances mean you can’t complete an assessment, you need consideration for a longer period of time, or if you have essential commitments which impact your performance in an assessment, you may be eligible for special consideration or special arrangements.

Special consideration applications will not be affected by a simple extension application.

Using AI responsibly

Co-created with students, AI in Education includes lots of helpful examples of how students use generative AI tools to support their learning. It explains how generative AI works, the different tools available and how to use them responsibly and productively.

Support for students

The Support for Students Policy reflects the University’s commitment to supporting students in their academic journey and making the University safe for students. It is important that you read and understand this policy so that you are familiar with the range of support services available to you and understand how to engage with them.

The University uses email as its primary source of communication with students who need support under the Support for Students Policy. Make sure you check your University email regularly and respond to any communications received from the University.

Learning resources and detailed information about weekly assessment and learning activities can be accessed via Canvas. It is essential that you visit your unit of study Canvas site to ensure you are up to date with all of your tasks.

If you are having difficulties completing your studies, or are feeling unsure about your progress, we are here to help. You can access the support services offered by the University at any time:

Support and Services (including health and wellbeing services, financial support and learning support)
Course planning and administration
Meet with an Academic Adviser

Weekly schedule

WK	Topic	Learning activity
Multiple weeks	Students are expected to commit to at least 5 hours per week of independent study in addition to timetabled activities.	Independent study (60 hr)
Week 01	Introduction to Digital Circuits and FPGA	Lecture (2 hr)
Week 01	Digital Circuits	Computer laboratory (3 hr)
Week 02	Introduction to Hardware description language	Lecture (2 hr)
Week 02	FPGA programming	Computer laboratory (3 hr)
Week 03	Modular Design, Simulation & FPGA Hardware	Lecture (2 hr)
Week 03	FPGA programming	Computer laboratory (3 hr)
Week 04	FPGA design, Finite State Machine	Lecture (2 hr)
Week 04	FPGA programming	Computer laboratory (3 hr)
Week 05	Communication protocols	Lecture (2 hr)
Week 05	FPGA programming	Computer laboratory (3 hr)
Week 06	Digital signal processing	Lecture (2 hr)
Week 06	FPGA programming	Computer laboratory (3 hr)
Week 07	Digital signal processing hardware	Lecture (2 hr)
Week 07	FPGA programming	Computer laboratory (3 hr)
Week 08	Design and Simulation - Review	Lecture (2 hr)
Week 08	FPGA programming	Computer laboratory (3 hr)
Week 09	Group Work on Major Project	Project (5 hr)
Week 10	Hardware/Software codesign	Lecture (2 hr)
Week 10	Group work on the Major Project	Project (3 hr)
Week 11	System Design, SoC, soft Processor	Lecture (2 hr)
Week 11	Group work on the Major Project	Project (3 hr)
Week 12	Major Project Evaluation	Project (3 hr)
Week 13	Overview	Lecture (2 hr)
Week 13	FPGA programming	Project (3 hr)

Attendance and class requirements

Tutorial/Lab attendance is mandatory, Lecture attendance is required.

Study commitment

Typically, there is a minimum expectation of 1.5-2 hours of student effort per week per credit point for units of study offered over a full semester. For a 6 credit point unit, this equates to roughly 120-150 hours of student effort in total.

Required readings

All material will be provided on EdStem and Canvas

Learning outcomes

Learning outcomes are what students know, understand and are able to do on completion of a unit of study. They are aligned with the University's graduate qualities and are assessed as part of the curriculum.

At the completion of this unit, you should be able to:

LO1. Understand and plan for the process of incremental implementation, recognising the importance of project management, teamwork, software/hardware co-design, and iterative development by members of a development team.
LO2. Design and prototype the hardware and software.
LO3. Understand in detail the software and hardware architecture of a modern digital programming.
LO4. Understand the basic architecture of traditional and modern FPGAs and System-on-Chips (SoCs)
LO5. Understand engineering concepts in the design of digital circuits.
LO6. Understand the role of hardware description languages in digital circuit implementation and describe simple hardware functions using a hardware description language.
LO7. Demonstrate the ability to differentiate between CISC, RISC, DSP processors and FPGAs, understanding the reasons for their evolution and adoption in specific designs.
LO8. Understand and select appropriately between various alternatives for data communications within a mechatronic system.

Graduate qualities

The graduate qualities are the qualities and skills that all University of Sydney graduates must demonstrate on successful completion of an award course. As a future Sydney graduate, the set of qualities have been designed to equip you for the contemporary world.

GQ1	Depth of disciplinary expertise Deep disciplinary expertise is the ability to integrate and rigorously apply knowledge, understanding and skills of a recognised discipline defined by scholarly activity, as well as familiarity with evolving practice of the discipline.
GQ2	Critical thinking and problem solving Critical thinking and problem solving are the questioning of ideas, evidence and assumptions in order to propose and evaluate hypotheses or alternative arguments before formulating a conclusion or a solution to an identified problem.
GQ3	Oral and written communication Effective communication, in both oral and written form, is the clear exchange of meaning in a manner that is appropriate to audience and context.
GQ4	Information and digital literacy Information and digital literacy is the ability to locate, interpret, evaluate, manage, adapt, integrate, create and convey information using appropriate resources, tools and strategies.
GQ5	Inventiveness Generating novel ideas and solutions.
GQ6	Cultural competence Cultural Competence is the ability to actively, ethically, respectfully, and successfully engage across and between cultures. In the Australian context, this includes and celebrates Aboriginal and Torres Strait Islander cultures, knowledge systems, and a mature understanding of contemporary issues.
GQ7	Interdisciplinary effectiveness Interdisciplinary effectiveness is the integration and synthesis of multiple viewpoints and practices, working effectively across disciplinary boundaries.
GQ8	Integrated professional, ethical, and personal identity An integrated professional, ethical and personal identity is understanding the interaction between one’s personal and professional selves in an ethical context.
GQ9	Influence Engaging others in a process, idea or vision.

Outcome map

Learning outcomes	Graduate qualities
Learning outcomes

Alignment with Competency standards

Outcomes	Competency standards
	National Standard of Competency for Architects - 1. Design: Project briefing 2. Design: Pre-Design 4. Design: Schematic Design
	Engineers Australia Curriculum Performance Indicators - 4.4. Skills in implementing and managing engineering projects within the bounds of time, budget, performance and quality assurance requirements.
	Engineers Australia Curriculum Performance Indicators - 5. PRACTICAL AND ‘HANDS-ON’ EXPERIENCE

Engineers Australia Curriculum Performance Indicators -

Competency code	Taught, Practiced or Assessed	Competency standard
1		ENABLING SKILLS AND KNOWLEDGE DEVELOPMENT
3		PERSONAL AND PROFESSIONAL SKILLS DEVELOPMENT
5		PRACTICAL AND ‘HANDS-ON’ EXPERIENCE

Responding to student feedback

This section outlines changes made to this unit following staff and student reviews.

The individual component has been increased by adding in class Q&A

Additional information

Work, health and safety

Mechatronic lab induction is mandatory. Please get familiar with the Lab rules:

You will only have access to the lab during your scheduled lab sessions.
A record of attendance will be kept if required.
We have limited student numbers in each lab session.
Obey all Lab signage

Disclaimer

The University reserves the right to amend units of study or no longer offer certain units, including where there are low enrolment numbers.

To help you understand common terms that we use at the University, we offer an online glossary.

Current students

Overview

Overview

Unit details and rules

Teaching staff

Assessment

Assessment

Assessment summary

Assessment criteria

Use of generative artificial intelligence (AI)

Late submission

Academic integrity

Learning support

Learning support

Simple extensions

Special consideration

Using AI responsibly

Support for students

Weekly schedule

Weekly schedule

Attendance and class requirements

Study commitment

Required readings

Learning outcomes

Learning outcomes

Graduate qualities

Outcome map

Alignment with Competency standards

Responding to student feedback

Responding to student feedback

Additional information

Additional information

Work, health and safety

Disclaimer

On this page

Useful links

MTRX3700: Mechatronics 3

Semester 2, 2025 [Normal day] - Camperdown/Darlington, Sydney

Overview

Overview

Unit details and rules

Teaching staff

Assessment

Assessment

Assessment summary

Assessment criteria

Use of generative artificial intelligence (AI)

Late submission

Academic integrity

Learning support

Learning support

Simple extensions

Special consideration

Using AI responsibly

Support for students

Weekly schedule

Weekly schedule

Attendance and class requirements

Study commitment

Required readings

Learning outcomes

Learning outcomes

Graduate qualities

Outcome map

Alignment with Competency standards

Responding to student feedback

Responding to student feedback

Additional information

Additional information

Work, health and safety

Disclaimer

On this page

Useful links